1. Field of the Invention
The present invention relates to a semiconductor device and a method of driving the semiconductor device.
2. Description of the Related Art
FIG. 1 is a schematic representation of a conventional light-triggered semiconductor device. As shown in FIG. 1, this device comprises three main components. The first component is an N-channel enhancement power MOSFET (Metal Oxide Semiconductor Field-Effect Transistor) 1. The second component is a light-trigger section 4 for light-triggering the power MOSFET 1. The third component is a gate power-supply section 3 for applying a gate voltage to the power MOSFET 1.
The light-trigger section 4 comprises a photodiode array 8, a discharging resistor 10 and a CMOS (Complementary Metal Oxide Semiconductor) logic unit 5. The photodiode array 8 can be driven by the light emitted from a light-emitting photodiode 9. The resistor 10 is provided to discharge a gate charge. The CMOS logic unit 5 has a P-channel depletion MOSFET 6a and an N-channel enhancement MOSFET 7a.
The gate power-supply section 3 comprises a power supply 11 for an external gate.
When the light-emitting photodiode 9 emits no light, the gate common to the MOSFETs 6a and 7a remains at the ground potential. Therefore, the P-channel depletion MOSFET 6a is conducting, while the N-channel enhancement MOSFET 7a is not conducting. As a result, the gate power-supply section 3 applies a positive bias to the gate of the power MOSFET 1, turning the MOSFET 1 on.
On the other hand, when the light-emitting photodiode 9 emits light, the common gate of the MOSFETs 6a and MOSFET 7a is positively biased by the photovoltaic power generated by the photodiode array 8. The P-channel depletion MOSFET 6a and the N-channel enhancement MOSFET 7a are thereby turned off and on, respectively. As a result, the charge is discharged from the gate of the power MOSFET 1 through the MOSFET 7a, whereby the power MOSFET 1 is turned off.
The light-triggered semiconductor device shown in FIG. 1 has problems. The MOSFETs 6a and 7a are simultaneously turned on when the CMOS logic unit 5 is switched, and a short current inevitably flows through the MOSFETs 6a and 7a. As a consequence, the gate of the power MOSFET 1 cannot be charged and discharged as fast as desired. Namely, the power MOSFET 1 can not be light-triggered quickly. The power MOSFET 1 may be replaced by a number of voltage-driven thyristors connected in series. In this case, however, isolating transformers must be used to isolate the power-supply sections connected to the gates of the voltage-driven thyristors. The semiconductor device will then become too large.
FIG. 2 is a schematic representation of another conventional light-triggered semiconductor device. As seen from FIG. 2, the gate power-supply section 3 incorporated in this device comprises a photodiode array 12 which generate a photovoltaic power. When the power-supply 15 supplies power to the light-emitting diode array 14, the light-emitting diodes of the array 14 emit light. The light is applied to the photodiodes of the array 12. Since the array 12 generates the photovoltaic power, the charging capacitor 13 connected to the array 12 is thereby charged. Thus, the photodiodes of the array 12 can be sufficiently isolated from one another, even if voltage-driven thyristors are used in great numbers and connected in series.
The light-triggered semiconductor device shown in FIG. 2 has problems, too. The photodiode array 12 achieves photoelectric conversion but at a very low efficiency. The current the array 12 supplies to the charging capacitor 13 is inevitably small. Accordingly, it takes too much time to charge the capacitor 13 and the power MOSFET 1 cannot be driven quickly.
Furthermore, according to the light-triggered semiconductors as shown in FIG. 1 and FIG. 2, if a voltage-increasing rate is high and/or a potential of the anode of the power MOSFET 1 located at the upper voltage side fluctuates in the case where a plurality of power MOSFETs 1 are connected in series, the power MOSFET 1 are erroneously fired, resulting in low reliability.
As indicated above, the conventional light-triggered semiconductor device is disadvantageous in three respects. First, it cannot be light-triggered quickly since it is impossible to charge or discharge the insulated gate of the voltage-driven switching element (e.g., a power MOSFET or an IGBT) as fast as is desired. Second, if a number of voltage-driven switching elements are connected in series, the device will become large. Third, the power MOSFET 1 is apt to be erroneously fired, resulting in low reliability.
Various insulated-gate semiconductor devices are known. They are classified into two types, i.e., voltage-driven ones and current-driven ones. The voltage-driven devices are preferred, because their gates can be driven by a smaller current than the gates of the current-driven devices.
FIG. 3 is a sectional view showing the turn-off insulated gate section of a conventional insulated-gate semiconductor device, i.e., an insulated-gate thyristor. As FIG. 3 shows, a p-type base layer 202 is provided on the upper surface of an n-type base layer 201 having a high resistance. An n-type emitter layer 203 is provided in the surface of the base layer 202. A p-type emitter layer 204 having a high impurity concentration is provided on the lower surface of the base layer 201. A cathode electrode 205 is provided on the emitter layer 203, and an anode electrode 206 on the emitter layer 204.
An n-type drain layer 207 is provided in the surface of the p-type base layer 202, spaced from the emitter layer 203 by a predetermined distance. A gate-insulating film 209 is provided on that portion of the base layer 202 which isolates the emitter layer 203 from the drain layer 207. A gate electrode 210 is provided on the gate-insulating film 209 and functions as a turn-off electrode. An N-channel MOSFET is provided, whose source is the emitter layer 203. The drain electrode 208 contacts not only the drain layer 207 but also the base layer 202. The base layer 202 is therefore short-circuited to the drain layer 207.
A turn-off gate electrode (not shown) has been formed simultaneously with the gate electrode 210, along the edge of the base layer 202, as a component of MOS structure.
In operation, the gate electrode 210 is applied with a voltage positive to the cathode electrode 205. An n-type channel is thereby formed right below the gate electrode 210. A part of the hole current flowing from the p-type base layer 202 directly into the n-type emitter layer 203 is made to flow from the drain electrode 208 to the cathode electrode 205, bypassing through the n-type drain layer 207 and the n-type channel. The hole current, thus bypassing, stops the injection of electrons from the n-type emitter layer 203 into the p-type base layer 202. As a result, the insulated-gate thyristor is turned off.
There are two problems with the insulated-gate thyristor (FIG. 3). First, the insulated-gate thyristor cannot be easily isolated from a control circuit (particularly, a circuit for supplying the gate signal to the device). Second, the insulated-gate thyristor is much influenced by electric noise generated when switching is effected, and is likely to make errors. If the thyristor is be used in, for example, a high-voltage power converter, it needs to have an isolating transformer or the like and will inevitably become larger. An example of a conventional device designed to solve the problems of the insulated-gate semiconductor device is a light-triggered thyristor (LTT).
FIG. 4 is a sectional view showing the light-receiving section of the conventional LTT. As seen from FIG. 4, the LTT comprises a main thyristor and a pilot thyristor. The main thyristor comprises a p-type emitter layer 204, an n-type base layer 201, a p-type base layer 202, and an n-type emitter layer 203a. The pilot thyristor is located beside the main thyristor, and comprises an n-type emitter layer 203b. The n-type emitter layer 203b is partly exposed to receive light.
How the LTT operates will be explained. When light is applied to the exposed part of the n-type emitter layer 203b, a photoelectric current is generated in the depletion region near the main junction formed by the n-type base layer 201 and the p-type base layer 202. The photoelectric current flows horizontally through the p-type base layer 202, reaching the cathode electrode 205a provided in the emitter short-circuiting section of the main thyristor. As the current flows to the cathode electrode 205a, a voltage drop takes place due to the transverse resistance of the p-type base layer 202. The emitter junction formed of the p-type base layer 202 and the n-type emitter layer 203a is biased forwards whereby electrons are injected from the n-type emitter layer 203a into the p-type base layer 202. Thus, the LTT is turned on.
In the immediate future there will be a demand for an insulated-gate semiconductor device which can be driven more efficiently. The conventional devices described above cannot be driven as efficiently as is desired. If provided with a plurality of insulated gates, any conventional insulated-gate semiconductor device is still unable to be driven so efficiently. This is because no methods are available which control the insulated gates easily and reliably.